Nonvolatile memories that are widely used in a market include flash memories or memories having a SONOS (Silicon Oxide Nitride Oxide Silicon) laminated structure. These memories are manufactured by using a technique to change the threshold voltage of a semiconductor transistor by the charge stored in an insulating film arranged above a channel region of the semiconductor transistor.
Microfabrication is essential to increase capacitance of a semiconductor transistor. Nowadays, however, it is difficult to even microfabricate a single semiconductor transistor having no charge accumulative function. Consequently, the semiconductor transistor only has a switching function to select memory cells read and written. A memory element is divided from the semiconductor transistor like a DRAM (Dynamic Random Access Memory). It is promoted to continue increasing capacitance of the semiconductor transistor by promoting microfabrication of each of these elements.
In order to continuously microfabricate an information memory function, it is studied to use a resistance change element as a memory element that uses an electrical element which can turn electrical resistance into signals having two or more values by some electrical stimulus. In a method of storing charge in a capacitance like DRAM, quantity of charge is decreased by microfabrication and degradation of the signal voltage is unavoidable. However, as electronic resistance takes the finite value even with microfabrication unless it is in the superconductive state, it is considered that there is an advantage to continue microfabrication if there is a principle and a material which change resistance value.
There exist several techniques to change electrical resistance by some electrical stimulus. One of the techniques that is advanced the most is a memory device to take advantage of switching crystal layers (amorphous crystals) that have different electrical resistances by double or triple figures by applying the current to a chalcogenide semiconductor. This memory device is typically called phase-change memory.
On the other hand, Metal/Metal oxide/Metal (hereinafter called MIM type) structure which has metal oxide sandwiched between electrodes is known to cause a resistance change upon application of high voltage or current. The present invention mainly relates to a MIM type resistance change element.
FIG. 1 is a schematic diagram showing the MIM type resistance change element. In FIG. 1, numeral 1 indicates an upper first electrode of the MIM type resistance change element. Numeral 2 indicates a resistance change material made of metal oxide. Numeral 3 indicates a lower second electrode of the MIM type resistance change element.
Non-Patent Document 1 discloses the resistance change element using Nickel Oxide (NiO). In 1950-1960, a phenomenon that resistance values are changed by voltage or current in a variety of materials were researched and reported.
FIG. 2 shows current-voltage characteristics of the MIM type resistance change element shown in FIG. 1. The resistance change element maintains a high-resistive OFF state or a low-resistive ON state in a nonvolatile manner even after it has been turned off and can switch resistance states by applying prescribed voltage or current stimulation when it is necessary. FIG. 2 shows an example of current-voltage characteristics of ON state and OFF state.
Applying a voltage of Vt1 or more to the high-resistive OFF state element, it is turned into the low-resistive ON state and shows current-voltage characteristic shown in FIG. 2(b). Then, applying a voltage of Vt2 or more to ON state element shown in FIG. 2(b), it is turned into the high-resistive OFF state and shows current-voltage characteristic shown in FIG. 2(a) again. The MIM type resistance change element can switch the state shown in FIG. 2(a) and that shown in FIG. 2(b) repeatedly. This characteristic can be used as a nonvolatile memory cell or a nonvolatile switch for switching circuits. In addition, the reference value that is criterion for high resistance or low resistance is not limited. Every reference value can be used if it is possible to switch high resistance and low resistance relatively. Note that 10 kΩ is favorably used as a reference value for example.
Additionally, in the MIM type resistance change element including metal oxide, a current pathway which is used in the low resistance state is not formed in the whole electrode surface, but is a regional current pathway 4 which is approximately several nm, or not more than several tens of nm in diameter as schematically shown in FIG. 3.
FIG. 4 shows electrode area dependencies of the resistance value in the low resistance state in the MIM type resistance change element of parallel plate type. Note that dependent properties shown in FIG. 4 are those in the case that NiO is used as the resistance change material of the current pathway 4 like Non-Patent Document 1. As shown in FIG. 4, the resistance value in the low resistance state is hardly depend on electrode area, and the low resistance state is kept by the current pathway 4 formed regionally. Therefore, in the case of applying the MIM type resistance change element as a memory element, the electrical resistance in the high resistance state is higher with the microfabrication and the electrical resistance in the low resistance state is almost unchanged. The resistance ratio between the states can be made higher. Consequently, it may be said that the MIM type resistance change element is a memory element suitable for microfabrication.
As shown in FIG. 5, however, there is a problem that the lower the resistance value in the low resistance state is, the more current a two-terminal MIM type resistance change element needs when switching to the high resistance state. Thus, when a fuse/anti-fuse type switching element which can repeatedly switch resistance states is realized, the problem described above is a major issue.
The two-terminal MIM type resistance change element needs a high-capacity power supply circuit (a driver) when switching the state to the high resistance state from the low resistance state. The point of power consumption and the point of increased manufacturing cost owing to increased chip area are also major issues.
A resistance change element having three or more terminals is also a semiconductor transistor. For example, a MOS transistor having a gate terminal of Metal Oxide Semiconductor (MOS) type can adjust the conductance between a source and a drain by controlling carrier density induced at depleted layer width of a semiconductor under the gate, that is, the interface between an insulator and the semiconductor by applying a voltage to the gate terminal. The amount of carriers induced in this case is approximately 10^18(cm^−3)˜10^20(cm^−3) in volume density.
A three-terminal type element having a semiconductor material in place of metal oxide is disclosed in Patent Document 1 and 2, for example. In Patent Document 1 and 2, an element which has a structure like a MOS type semiconductor transistor having metal oxide in place of semiconductor part is disclosed. They have multiterminal arrangement like semiconductor transistor having a source, a drain and a gate.
The resistance change element is the same as the semiconductor transistor on the point that charge is induced at the interface between the metal oxide and the insulator by the electric field generated in the gate terminal. However, the resistance change element is widely different from the semiconductor transistor in that the operating principle of the resistance change element is to change the conductance of whole surface under the gate electrode by producing the metal-insulator transition of the oxide material by the induced charge. The resistance change element needs to change the amount of charge of 10^21˜10^22(cm^−3) or more in volume density to produce the metal-insulator transition. This charge density is 100 times as much as that which is necessary to drive the MOS type semiconductor transistor.
Consequently, the resistance change element needs to generate an extremely high electric field just below the gate. A material for the insulator under the gate needs to have not only low interface state density but extremely high insulation breakdown voltage. This is a major obstacle to realize it.
In the present invention, the filamentary current pathway 4 with an extremely small cross-sectional area is formed between the electrodes corresponding to the source and the drain. The present invention is widely different from Patent Document 1 and 2 in that the current pathway 4 is maintained even after the power off in a nonvolatile manner. The current pathway 4 is formed by the structural change of microscopic area by minimal migration of metal or oxygen in a crystal, which is not so called metal-insulator transition by the control of the amount of charge in the material, as described below.
Another additional electrode controls or assists forming or breaking of the tiny current pathway 4. The high electric field to induce the metal-insulator transition is not needed. Additionally, in Patent Document 1, a tunnel insulator is provided between the source/drain electrode and the metal-insulator transition material in the MOS type transistor. In the present invention, the tunnel insulator is not needed. This point is also widely different.
Further, there exists a prior art document filed before the present invention which discloses a nonvolatile semiconductor memory device having an ion-conducting layer (see for example Patent Document 3).
Patent Document 3 discloses the nonvolatile memory device including a substrate, a switching element formed on the substrate, and a storage node connected to the switching element, in which the storage node has a lower electrode connected to the switching element and used as ion source, a data store layer formed over the lower electrode, a part of the data store layer being isolated from the lower electrode, a lateral electrode having a side face connected to the part of the data store layer isolated from the lower electrode, the lateral electrode being isolated from the lower electrode, and an upper electrode formed on the data store layer.    [Patent Document 1]    Japanese Unexamined Patent Application Publication No. 2006-319342    [Patent Document 2]    Japanese Unexamined Patent Application Publication No. 9-129839    [Patent Document 3]    Japanese Unexamined Patent Application Publication No. 2007-59914    [Non-Patent Document 1]    J. F. GIBBONS and W. E. BEADLE ‘SWITCHING PROPERTIES OF THIN NiO FILMS’ Solid-State Electronics, Vol. 7, P. 785-797, 1964.